Low power circuit design using NCL based asynchronous method

The null convention logic (NCL) based circuit design methodology eliminates the problems related to noise, clock tree, electromagnetic interference and also reduces significant power consumption. In this paper, we would like demonstrate advantage of low consumption NCL asynchronous on a large scale, thus used advanced encryption standard (AES) as an illustrative example. addition, proposed two pipelined AES models using synchronous technique NCL. Besides, these were realized by version control system (VCS) tool simulate Design Compiler synthesize parameters in consumption, processing speed area. synthesis results indicated that model had decrease 71% compared with model. Moreover, show outstanding (a 91.12% 93,23%) gating without respectively.